Marvell Technology Group

Marvell offers a broad, innovative portfolio of data infrastructure semiconductor solutions spanning computing, networking, security, and storage. Our products are essential to the required transformations the carrier, enterprise, data center and automotive data infrastructure market segments must achieve to advance the emerging services and applications of the proliferating data economy. To deliver the data infrastructure technology that connects the world, we’re building solutions on the most powerful foundation: our partnerships with our customers. Trusted by the world’s leading technology companies for over 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Our success is dependent on the tenacity of our global team coming together to lead that change. At Marvell, everyone has an important role to play in changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better. Visit https://www.marvell.com/

Jobs by Marvell Technology Group


Test Chip Design and Hardware Validation Engineer

Location: Burlington, Vermont

Type: full-time

Education: batchelors

Experience: 1-2yrs

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Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.   At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.   Your Team, Your Impact   The Central Engineering Test Chip Development team is responsible the hardware validation of custom SRAM, logic, IOs, and security circuits for all Marvell business units in the latest semiconductor technology nodes. This is accomplished by designing test chips, providing a laboratory environment to collect hardware measurements, and working with the custom circuit design teams to complete the necessary circuit analysis for hardware validation.   What You Can Expect Job responsibilities include:
  • Logic design and verification through simulation (Verilog) of test chip experiments.
  • Verilog test pattern generation, simulation, and debug of test chip experiments in hardware.
  • Development of a laboratory environment to enable debug, diagnostics, and data collection of hardware measurements.
  • Software development: data processing with scripts (Perl, Python, tcl) for design, hardware characterization, laboratory measurements, and analysis of results.
  • Analyze, summarize, document, and present results.
What We're Looking For Bachelor’s degree in Computer Engineering, Electrical Engineering or related fields and at least 1-3 years of related professional experience. Master’s degree in Computer Engineering, Electrical Engineering or related fields with no professional experience.

Senior Staff Engineer, Design Verification

Location: Burlington, Vermont

Type: full-time

Education: batchelors

Experience: 5-10yrs

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Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.   At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.   Your Team, Your Impact   The Synthesizable IP team in Marvell's Central Engineering group develops digital logic designs that supply high value-add to System-on-Chip Integrators. We have developed a variety of fully verified custom and configurable logic designs and offer design-to-spec logic design and verification services with quick design cycles. The group collaborates with other teams developing Analog/Mixed Signal (AMS) blocks as well as the overall chip designers to architect and propose solutions and owns the design through the hardware bring-up of the test chips and products.   What You Can Expect The position involves working with the other members of the Synthesizable IP team to interpret input from potential clients and our CE AMS colleagues to propose digital solutions that will help add value to Marvell's product offerings. Once a proposal is accepted, the design verification team will draw up a detailed verification plan based on the design specification - including architecture of the test bench, description of the required elements, and criteria for completion of the verification process. The team will then execute to the plan with rigor, providing detailed information to the designer for any bugs uncovered during the verification process, and ultimately providing a final report. What We're Looking For Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience. Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.   The candidate must be a self-starter with proven experience in architecting and developing SystemVerilog test benches for digital design verification. Experience with industry standard verification tools is essential: for example, Cadence XCelium. Skill in interpreting specifications and planning, along with the ability to debug is also critical. It's highly preferable that the candidate have a working understanding of Verilog RTL and digital design techniques. A knowledge of a variety of industry specifications and protocols is also desirable.

Digital Design Engineer

Location: Burlington, Vermont

Type: full-time

Education: batchelors

Experience: 1-2yrs

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Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.   At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.   Your Team, Your Impact   As a Digital IC Design Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing Intellectual Property (IP) to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a digital design team of about ten people making a big impact on this organization. Our team is working on custom ultra-dense and performance Static Random Access Memory (SRAM) compilers in leading edge FinFET and Gate-All-Around (GAA) technologies.   What You Can Expect
 
  • Design and implement digital circuits with ownership of at least one sub-circuit block
  • Schematic entry (Cadence Virtuoso), circuit simulation (Spectre, MDL, Post-layout), and verification (Verilog)
  • Statistical analysis (Monte Carlo) across Process, Voltage, Temperature (PVT)
  • SRAM view development and characterization
  • Identify and propose innovative solutions to improve the power-performance-area metrics
  • Create optimal GDS layout with the physical design team
  • Silicon evaluation in partnership with the Hardware and Silicon Validation Team
  • Analyze, summarize, document, and present results
What We're Looking For
  • Experience using transistor-level circuit design software like Cadence Virtuoso or Spectre X for design analysis
  • Experience with custom memory and transistor-level digital circuit design in advanced CMOS technologies
  • Ability to work well in a collaborative team environment
  • Proficiency in scripting languages (Perl, Python, TCL, ...)
  • BS, MS or equivalent in Electrical Engineering, Computer Engineering, or similar field with relevant work experience

Senior Staff Engineer, Analog IC Design

Location: Burlington, Vermont

Type: full-time

Education: batchelors

Experience: >10yrs

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At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better. The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.  

The Opportunity

Our group develops ESD solutions for all IP. We review the ESD/LUP consideration for all designs before approving the tapeout. We also develop digital and analog IO pads and other ESD designs.   Job Responsibilities: Responsible for: 1. provide directions and support to debug esd/htol qualification issues and customer returns 2. review of all IP and confirm that the ESD circuits are robust and meet the design requirements 3. development of IO and ESD circuits   Requirements: Bachelor’s degree in Computer Science, Electrical Engineering or related fields and >10 years of related professional experience. Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with >8 years of experience.