Senior Staff ASIC Test Engineer

Marvell Technology Group

Location: Burlington, Vermont

Type: Full Time

Education: Bachelor's Degree

Experience: 3 - 5 Years

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity


Marvell is looking for an experienced, motivated ASIC Test Engineer. You would be part of a collaborative, dynamic and global test engineering team supporting development for complex SoC products designed in leading-edge process and packaging technologies. You will work closely with Product, Application and Design engineering teams to develop, debug and support test programming solutions for those products.


Job Responsibilities:

  • Collaborate with test and product engineers to deliver test solutions for ASIC SoC products.
  • Understand design-for-test strategies and IP test methods.
  • Specify and verify test hardware for wafer sort and final test hardware.
  • Develop test plans and methodologies to meet product specifications and facilitate reuse of code/solutions across products within a technology.
  • Develop characterization, qualification and production test programs for wafer sort and final package test.
  • Drive/support yield, cost, and quality improvement initiatives for mass production test.




  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience.
  • Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.
  • Minimum 3 years of test program development/debug experience on the Teradyne UltraFLEX ATE tester platform. Demonstrable expertise with the UltraFLEX programming environment (IGXL/VB). Excellent debug and diagnostics skills.
  • Broad knowledge of digital and mixed-signal DFT, test methods and protocols (scan, memory BIST, JTAG/IJTAG, serial IO, high-speed IO loopback testing, etc).
  • Proficiency working within the Linux environment. Expertise with other programming languages (C/C++, Perl/Python, etc) and experience working in collaborative programming environment (specifically, Git) are a plus.
  • Must have effective interpersonal, teamwork, and communication skills
  • Must be willing/able to travel occasionally (1-2x/year) if needed to support test debug at remote location.
  • Excellent problem solving, teamwork, collaboration and interpersonal skills
  • Must have the ability to multi-task in a fast-paced environment

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