Senior Principal SoC Architect – 2101760

Marvell Technology Group

Location: Burlington, Vermont

Type: Full Time

Education: Bachelor's Degree

Experience: 3 - 5 Years

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity

This team is responsible for the overall SoC architecture of OCTEON DPUs for 5G, cloud, carrier, and enterprise datacenter applications, and for CSSPs for datacenter servers and automotive compute applications.

Marvell’s Processor Business Group (PBG) is looking for an experienced, talented architect to join our architecture team.

As an SoC architect, you’ll be responsible for:

Engaging with customers, engineering, and marketing to lead chip architecture of innovative and complex processor-based SoCs

Overseeing the creation of documentation

Architecting new blocks and capabilities

Overseeing and coordinating IP evaluation, IP block microarchitecture, pinouts, cost estimates, and power estimates

Helping develop the team and mentoring other architects/engineers 

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Bachelor’s, Master’s, or PhD degree in Computer Science, Electrical Engineering or related fields and 10+ years of related professional experience in system architecture development and related fields

Demonstrated expertise in SoC architecture, e.g., interconnects, I/O technologies, virtualization, memory hierarchies, clocks, resets, power management, security, etc.

Preferred qualifications: 

Knowledge of packet processing pipelines

Knowledge of modern networking protocols

Experience with heterogenous SoCs and NoC interconnects

Knowledge of Arm v8/v9 processors and Arm CHI and AXI interconnects

Deep understanding of ASIC design flow including RTL design, verification with System-Verilog, logic synthesis, place and route, timing closure, etc.

Ability to present to customers and to analyze customer feedback

Experience working with geographically distributed teams

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