Senior ASIC Product Engineer

Marvell Technology Group

Location: Burlington, Vermont

Type: Full Time

Education: Bachelor's Degree

Experience: 5 - 10 Years

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.


The Opportunity


Marvell is looking for an extremely motivated, talented Senior ASIC Product Engineer. You will become part of a dynamic product engineering team working on the most advanced semiconductor technologies. Working at Marvell is exciting with a lot of growth potential within the company. You will work closely with ASIC Design, Applications and Test Engineering teams to design, develop, debug and maintain product test solutions for our industry leading large and complex ASIC products.


Job Responsibilities:

– As a Senior ASIC Product Engineer, you will work closely with design, process, DFM/DFT, and test teams.  Lead debug and characterization of new ASIC product test and IP’s.

– Help develop test strategies and plans for the most advanced ASICs in the world.

– Develop creative solutions by looking at volume data, analyzing trends, and test lab experimentation to solve challenging yield and test problems seen on the production floor.

– Lead optimization and continuous improvement efforts on the production test screen specification.

– Balance business requirements to meet yield, quality, test time, and DPPM expectations.

– Help and support RMA testing, customer facing teams, and quality and reliability teams during customer escalations to understand the issue and fix gaps identified in coverage.

– Define yield and manufacturing specifications for various test insertions (Wafer Sort, Final Test and System level Test).

– Play a lead role in test flow optimization and test time reduction.

– Work with design and DFT/DFM groups to define and enhance yield and test methodologies.

– Play a key role in new product qualification before volume production as well as new package/fab qualifications.




  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience or
  • Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.
  • Good background in ATE testing on Advantest Ultraflex systems, test methodology development, DFT/DFM, and high-speed digital testing experience required.
  • Mixed Signal testing is a strong plus.
  • Must have excellent project planning, collaboration and communication skills.
  • Excellent problem solving, teamwork, and collaboration skills.
  • Has an inherent sense of urgency and accountability.
  • Extensive Data analysis experience and skills.
  • Up to 10% Travel required including international

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