Entry Level Logic Design and Verification Engineer

Marvell Technology Group

Location: Burlington, Vermont

Type: Full Time

Education: Bachelor's Degree

Experience: Less than 1 year

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity

The Central Engineering Processor and ASIC Design Services Team within Marvell provides chip solutions for next generation 5G carriers, cloud data centers, enterprise, and automotive applications. As a member of the team, you will have the opportunity to develop and grow your design skills, supporting architecture to RTL and netlist to GDSII implementation of ASIC and processor designs. Come join a world-class team and help bring the next generation of exciting products to market!

Job Responsibilities:

  • Develop, review, and update specifications
  • Configure and integrate complex IP cores and design customer logic for ASIC systems
  • Synthesize RTL (register-transfer level) to meet timing and optimization requirements
  • Implement logic checks including lint, CDC, RDC, and logical equivalency.
  • Functionally verify Systems on Chip (SOCs) through simulation of RTL and gate level designs using industry standard tools and processes
  • Develop a constrained-random verification test environment using Verilog/System Verilog, UVM and C programming, including testbenches, checkers, monitors, drivers and other components
  • Use problem solving skills to debug failing simulations and create test vectors and testing scenarios to exhaustively exercise a design

Requirements:

Minimum Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related fields
  • Great problem solving and critical thinking skills
  • Detail oriented and self-motivated team worker with good verbal and written communication skills

Preferred Qualifications

  • Experience coding in Verilog and System Verilog
  • Experience programming in C, C++, or Python
  • Knowledge of advanced digital design, CPU design, and computer architecture
  • Familiarity with ARM microprocessor architectures and AMBA bus standards
  • Familiarity with industry standard protocols such as DDR/LPDDR, PCIE, Ethernet, and USB
  • Familiarity with industry standard EDA tools from Cadence, Synopsys, and/or Mentor

© 2022 Vermont Technology Alliance

Site by Scout Digital