ASIC Test Engineering Intern

Marvell Technology Group

Location: Burlington, Vermont

Type: Internship

Education: High School Diploma / GED

Experience: Less than 1 year

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity

The proliferation of the data economy is accelerating and creating significant strains on the global data infrastructure. Built on decades of expertise and execution, Marvell’s custom ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property (IP) and a wide-array of flexible business models.

Job Responsibilities:

Test Engineering Intern responsibilities will include some of the the following activities:

  • Assisting with the development of ATE test hardware or software to support testing of new ASIC products
  • Developing software tools to facilitate the development or verification of ASIC test programs
  • Assisting with debug or characterization of tests for ASIC products
  • Performing data mining and analysis of wafer sort and/or final test data to support product development or problem-solving initiatives
  • Analyzing data cost reduction opportunities (e.g. yield improvement, test insertion elimination, test time reduction, multiple test site enhancement & wafer sort implementation)
  • Assisting with continuous improvement for product quality, test efficiency, production throughput & test hardware improvement

Requirements:

  • Candidate must be currently pursuing a BS/MS (preferred) degree in Electronics/ElectricalEngineering or related technical field(s)
  • Knowledge of digital/analog circuit fundamentals, design-for-test DFT) and/or testing from coursework/projects.
  • Must have excellent communication, collaboration, analytical and problem-solving skills
  • Working knowledge of one of more programming languages (C/C++/C#, Java, etc.) and preferably experience with a collaborative software development environment (such as Git/GitHab)
  • Working knowledge of one or more scripting languages such as VBA, Perl, Python, etc. and/or data analysis tools would be a plus.

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