ASIC Senior Physical Design Engineer

Marvell Technology Group

Location: Burlington

Type: Full Time

Education: No Ed Requirements

Experience: 5 - 10 Years

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.


The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

 

The Opportunity

 

Physical design work on specified technology.

  • Use Cadence Innovus place and route
  • Tempus timing tool (show proficiency in timing closure)
  • Understand Standard Cell library structure using 5,7,14 nm with ability to lead to 3nm.
  • Demonstrate use of High speed clock distribution
  • Have experience with above specified EDA tools to support custom design , simulation, layout.
  • Develop scripts, programs, flows, and methodologies to automate and improve custom design productivity.
  • Manage deliverables (Optimized sizing/placements/Power/Performance/Area)
  • Bachelor of Science in Electrical Engineer, prefer Master’s of Science Electrical Engineer
  • Minimum 5 years of experience in semiconductor CAD, EDA, or custom design in both circuit and layout.
  • Semiconductor hardware design experience is a preferred qualification.
  • In-depth knowledge of custom design environment from schematic capture, simulation, layout.
  • Working experience on latest Technology.
  • Experience working with communications chips.
  • Familiarity with industry standard interfaces (PCIe,DDR)
  • Hands on experience in industry custom design tools.
  • Knowledge of script writing in Perl/TCL/Python language.
  • Have ability to use Linux OS, version control tools, and Unix utilities.

 

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