ASIC IP Integration Senior Level Application Engineer

Marvell Technology Group

Location: Burlington

Type: Full Time

Education: Master's Degree

Experience: 5 - 10 Years

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.


The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

 

The Opportunity

Become a member of a best-in-class custom ASIC design team that provides design solutions and offerings for next generation 5G carriers, cloud data centers, enterprise and automotive applications. You will have an opportunity to design and integrate complex ASIC systems in leading technologies using industry-standard processes and tools.

  • Assist ASIC BU and customers on IP selections accordingly to product requirements. 
  • Assist customers and design teams on design integration of the IPs, logically and physically. 
  • Conduct IP usage reviews and design sign of with customers and design teams. 
  • Provide assistance on hardware test and hardware bring up debug. 
  • Lead lesson learn with Design Center teams and IP development

 

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience.


Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience.

 

Minimum qualifications  

  • Knowledge of VLSI backend design flow and tools  
  • Knowledge of semiconductor fabrication processes, test, and qualification  
  • Experience with circuit-modeling and analysis related to timing, noise, signal integrity  
  • Knowledge of design and application aspects as related to power, thermal, failure rate, quality and reliability.   
  • Experience with high speed interfaces and applications, such as PCIe, Ethernet, DDR, and HBM. Deep knowledge of the IP specifications, physical integration, and application usage. 
  • Experience in hardware debug 
  • Good problem solving and critical thinking skills  
  • Good written and verbal communication skills  
  • Self-starter, goal oriented and a team player  

 

Preferred Qualifications  

  • IP development background 
  • Knowledge of IP design-for-test concept 

 

 

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