ASIC Architecture Intern

Marvell Technology Group

Location: Burlington, Vermont

Type: Internship

Education: Bachelor's Degree

Experience: Less than 1 year

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity

About the Position:

Marvell Semiconductor is looking for an ASIC Architecture Intern. The qualified candidate will work in a VLSI design environment as part of a multi-functional team. Tasks may include requirements gathering requirements, RTL level design, synthesis, place, route, timing of complex logic and memory structure. Candidate will also have the opportunity to gain exposure to the wider organization as a part of these tasks. Must be currently enrolled in an accredited university in an undergraduate or graduate degree program with an interest and aptitude to work in Computer/Electrical Engineering and technical communications. The qualified candidate will have the opportunity to contribute to the development of IP that will be used across ASIC BU.

Job Responsibilities:

Responsibilities:

  • Gathering and synthesizing requirements for complex logic and memory structures
  • Designing and developing complex blocks using Verilog
  • Synthesis using Synopsys DC
  • Place, route, timing closure using various industry standard tool flows

Requirements:

Minimum Qualifications:

  • Candidate MUST be currently pursuing a BS/MS degree in CE/EE or related technical field(s)
  • 0-1 years of previous experience

Preferred Qualifications:

  • Excellent design and development experience, pursuing a degree in CE/EE
  • Strong verbal and written communication skills
  • Excellent understanding of VLSI Design in Verilog
  • Proficiency in high-level programming languages such as C#/Java, in a Unix or Windows environment
  • Demonstrated organized and thorough approach to documentation and design
  • Strong creative problem-solving skills
  • Knowledge of ASIC semiconductor industry is a plus
  • Experience in place/route/timing closure is a big plus

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