ASIC 6G Wireless Networking Intern

Marvell Technology Group

Location: Burlington, Vermont

Type: Internship

Education: High School Diploma / GED

Experience: Less than 1 year

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity

Marvell Semiconductor is looking for an ASIC 6G Wireless Networking Intern. The qualified candidate will work as part of a multi-functional team to study next generation 6G wireless architectures and system requirements with a view to integrating radio front ends and digital front ends for next generation high band radio systems (>50GHz). Tasks will include: working with marketing team to pick a 6G high band system design point, exploring architecture options that allow for optimal integration of RF, data converters and digital processing for 6G radios. Candidate will also have the opportunity to gain exposure to the wider organization as a part of these tasks. Must be currently enrolled in an accredited university in an undergraduate or graduate degree program with an interest and aptitude to work in Computer/Electrical Engineering and technical communications.

Job Responsibilities:     

  • Assessing physical implementation issues of sensitive RF signals and digital logic in advanced technology nodes (5nm and 3nm) using simulation

  • Working with ASIC Digital Physical Design teams to identify best practices for isolation and RF performance of radio architecture.

Minimum Requirements:

  • Candidate MUST be currently pursuing a BS/MS degree in CE/EE or related technical field(s)

  • 0-1 years of previous experience

Preferred Requirements:

  • Excellent design and development experience, pursuing a degree in CE/EE

  • Analog design, RF design, including Analog to Digital and Digital to Analog converters

  • Wireless systems knowledge, understanding of system configuration (massive MIMO, high band, Zero IF, direct synthesis) and system parameters such as noise floor and channel isolation

  • Strong verbal and written communication skills

  • Demonstrated organized and thorough approach to documentation and design

  • Strong creative problem-solving skills

  • Knowledge of ASIC semiconductor industry is a plus

  • Experience in place/route/timing closure is a big plus

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